Intel Mac Power-On Sequence: MagSafe to Stable PPBUS_G3H
This component-level diagnostic guide explains the early power-on sequence used by older MagSafe Intel Mac logic boards built around an ISL6259 or ISL6259A-type charger controller. It starts when a charger is connected with the battery disconnected and ends when a stable PPBUS_G3H rail is present.
Quick answer
On the 820-3437 reference board, full adapter voltage must reach PPDCIN_G3H, U7090 must create 3.425 V PP3V42_G3H, and U7100 must validate DCIN and ACIN before asserting SMC_BC_ACOK and opening Q7180. The U7100-controlled buck stage then creates an approximately 8.1 V base PPBUS_G3H rail, which the SMC adjusts over SMBus to about 8.45 V.
The 2013 13-inch MacBook Air A1466 logic board 820-3437 is the principal example because its schematic shows each stage clearly. The diagnostic method also applies to many earlier MagSafe Intel Macs that use the same charger topology, but component designators and target voltages can differ by model.
Scope limit: this sequence does not describe USB-C/T2 charging systems or Apple silicon Macs. For the next stage of this Intel Mac power sequence, see MacBook SMC circuits and PPBUS_G3H voltage adjustment. For later sleep-signal diagnosis, see the PM_SLP_S4_L timing guide.
Apple silicon Macs use a substantially different PMU, embedded-SMC and SoC power architecture. See the complete M1 Pro A2442 820-02098 power-on sequence.
Table of Contents
What this guide covers
The board is connected to a known-good MagSafe adapter with the battery disconnected. The objective is to trace power in the order it should appear, from adapter detection to a regulated system bus. Test the first missing checkpoint; a missing PPBUS_G3H rail does not automatically identify U7100, the SMC or any single component as faulty.
Sequence at a glance
| Stage | Key checkpoint | 820-3437 reference | What it proves |
|---|---|---|---|
| 1. Adapter accepted | PPDCIN_G3H | Full adapter voltage, typically about 14.5–14.9 V on this MacBook Air | The adapter has left its low-energy detection state and is supplying the DC-in rail. |
| 2. Always-on rail | PP3V42_G3H at L7095 | 3.425 V | U7090 is operating and the SMC can receive G3Hot power. |
| 3. Charger IC awake | U7100 DCIN, VDD and ACIN | DCIN at adapter voltage; VDD about 5.1 V; ACIN above the 3.2 V threshold | The ISL6259 has power and sees a valid adapter-input level. |
| 4. Input valid | SMC_BC_ACOK | High through its approximately 3.3 V pull-up | U7100 has accepted the adapter input. |
| 5. Input FET path | PPDCIN_G3H_CHGR after Q7180 | Near adapter voltage | AGATE/SGATE control has opened the inrush and charger-input path. |
| 6. Base system bus | PPBUS_G3H at L7130 | Approximately 8.1 V | U7100, Q7130 and L7130 are producing the two-cell base bus voltage. |
| 7. Stable system bus | PPBUS_G3H at L7130 | About 8.45 V after SMC adjustment | SMBus communication and charger regulation have reached the normal target for this board. |
These values are 820-3437 references, not universal targets. Always confirm the schematic and boardview for the logic board being repaired.
1. MagSafe connection and full PPDCIN_G3H
When MagSafe is first connected, the adapter begins in a limited, low-energy detection state. A compatible input and load allow it to transition to its full output. On this 45 W MacBook Air example, PPDCIN_G3H should then be close to the adapter rating, normally about 14.5–14.9 V.
If full PPDCIN_G3H never appears, diagnose the adapter, MagSafe connector/DC-in board, cable and input path before moving downstream. A lit connector LED is useful information, but it does not prove that every charger-control signal or PPBUS_G3H is correct.
2. U7090 creates PP3V42_G3H
U7090 is an LT3470-based low-power buck converter. Adapter input reaches it through R7005 and D7005; battery input can reach the same supply path through R7006 and D7005. U7090 and L7095 create the 3.425 V PP3V42_G3H always-on rail, with the schematic specifying up to 300 mA.
Checkpoint: measure PP3V42_G3H on L7095. If it is missing or low, first determine whether the rail is being pulled down by its load. With the board unpowered, compare resistance to ground and isolate the load before condemning U7090. Then examine the U7090 input, output, feedback network, L7095 and nearby capacitors.
3. U7100 starts: DCIN, VDD and ACIN
U7100 is the ISL6259 charger and system-bus controller on this board. CHGR_DCIN reaches pin 2. The controller develops approximately 5.1 V on pin 19 VDD, and VDD feeds the VDDP/PWM supply path through R7101.
The adapter voltage is divided by R7110 and R7111 before reaching pin 3 ACIN. The 820-3437 schematic specifies an ACIN threshold of 3.2 V ±50 mV and notes that the divider corresponds to an input threshold of about 13.15 V. With a normal 14.5–14.9 V adapter input, ACIN is commonly around 3.8 V.
4. ACOK tells the SMC that adapter input is valid
After its input conditions are valid, U7100 releases the open-drain ACOK output on pin 14. The SMC_BC_ACOK signal is then pulled high to approximately 3.3 V and informs the SMC that the charger controller accepts the adapter input.
Do not combine two separate checks: SMC_BC_ACOK comes from the charger controller, while MagSafe adapter identification and LED control use the one-wire communication path. A green LED can indicate that one-wire communication is working, but it does not by itself prove that ACOK, Q7180 or PPBUS_G3H is correct.
5. AGATE and SGATE open Q7180
U7100 controls the back-to-back Q7180 input MOSFETs with AGATE and SGATE. The circuit first manages inrush current, then fully enhances the charger-input path when conditions are acceptable. Adapter power passes to PPDCIN_G3H_CHGR and through R7120, the 0.02 Ω current-sense resistor monitored by U7100 at CSIP and CSIN.
Do not diagnose Q7180 by gate voltage alone. A P-channel MOSFET turns on according to the gate-to-source voltage, so measure source, gate and drain together. If the input voltage is present before Q7180 but missing after it, check AGATE/SGATE control, both halves of Q7180, the surrounding divider and the current-sense path.
6. Q7130 and L7130 create base PPBUS_G3H
The PWM section of U7100 drives Q7130 through UGATE and LGATE. Q7130, L7130 and the output capacitors form the buck stage that creates PPBUS_G3H. The controller also monitors PHASE and the current-sense inputs for unsafe conditions.
Pin 6 CELL selects the base target used before host adjustment: approximately 12.22 V for a three-cell setting, 8.1 V for a two-cell setting, or 4.05 V for a one-cell setting. On 820-3437, the two-cell selection produces an approximately 8.1 V base PPBUS_G3H.
7. SMBus adjustment produces stable PPBUS_G3H
Once the SMC is operating, it communicates with U7100 over SMC_BC_SCL and SMC_BC_SDA. The SMC commands the charger controller to raise the base rail to the normal board target. On a working 820-3437, PPBUS_G3H is typically about 8.45 V at L7130; small measured variation can occur with the adapter, load and instrument.
A rail that reaches approximately 8.1 V but never moves to the commanded target is a different fault from a rail that is completely missing. The first pattern points toward SMC state, SMBus communication or U7100 response; the second requires checking the load and the complete switching path.
Recommended measurement order
| Order | Measure | Expected on 820-3437 | If missing or wrong |
|---|---|---|---|
| 1 | PPDCIN_G3H | Full adapter voltage | Adapter, MagSafe/DC-in path, connector and input loading. |
| 2 | PP3V42_G3H at L7095 | 3.425 V | U7090 supply, buck stage, feedback or a shorted load. |
| 3 | U7100 pin 2 DCIN | Near adapter voltage | Trace and components between DC-in and U7100. |
| 4 | U7100 pin 19 VDD | About 5.1 V | U7100 supply/startup or loading on VDD. |
| 5 | U7100 pin 3 ACIN | Above 3.2 V; commonly about 3.8 V | R7110/R7111 divider, DC-in level or ACIN loading. |
| 6 | SMC_BC_ACOK | High, approximately 3.3 V | U7100 input validation, pull-up or a signal-line load. |
| 7 | Before and after Q7180 | Adapter voltage passed through | AGATE/SGATE, Q7180, gate network or overcurrent protection. |
| 8 | R7120 / CSIP-CSIN path | Continuous, plausible current-sense path | Open/damaged sense resistor, trace or excessive current. |
| 9 | UGATE, LGATE and PHASE | Switching activity during regulation | U7100 enable/protection state, Q7130 or a shorted output. |
| 10 | PPBUS_G3H at L7130 | About 8.1 V base, then about 8.45 V | Buck stage if absent; SMBus/SMC control if stuck near base. |
| 11 | SMC_BC_SCL and SMC_BC_SDA | Idle high with communication activity | Pull-ups, shorts, SMC state or U7100 communication. |
Four early-power fault patterns
| What you see | What it usually means | Where to go next |
|---|---|---|
| PP3V42_G3H is missing or low | The always-on supply has not established SMC power, or its load is pulling it down. | Check U7090 input/output, L7095, feedback components and resistance to ground. |
| PP3V42_G3H is correct, but ACOK or the post-Q7180 input is missing | U7100 has not validated the adapter or cannot open the input MOSFET path. | Check DCIN, VDD, ACIN, SMC_BC_ACOK, AGATE/SGATE and Q7180. |
| PPBUS_G3H is missing or very low | The bus may be shorted, the charger buck stage may not be switching, or protection may be active. | Check resistance to ground, R7120, PHASE, UGATE/LGATE, Q7130, L7130 and U7100 conditions. |
| PPBUS_G3H reaches about 8.1 V but does not settle near 8.45 V | The base regulator is working, but SMC-commanded adjustment is absent or not being accepted. | Check SMC power/reset state, SMC_BC_SCL/SDA activity, pull-ups and U7100 response. |
Common diagnostic mistakes
- Starting at PPBUS_G3H: confirm PP3V42_G3H, U7100 VDD/ACIN, ACOK and the Q7180 input path first.
- Assuming a green MagSafe LED proves the charger circuit: the LED/one-wire path and U7100 ACOK path are related to adapter operation but are not the same signal.
- Replacing the SMC because PPBUS is low: distinguish missing, shorted, base-only and unstable PPBUS behavior before selecting a suspect.
- Using the 820-3437 voltage targets on every Mac: confirm the model-specific schematic, battery-cell configuration and adapter rating.
- Power-injecting before isolating the source: disconnect the charger and battery, use a current-limited supply, and stay below the safe voltage of the rail being tested.
Related Intel Mac power-sequence guides
After stable PPBUS_G3H is present, continue with MacBook SMC circuits and PPBUS_G3H adjustment. If the board reaches the later CPU/PCH startup stage but PM_SLP_S4_L is missing or abnormal, use the Intel Mac PM_SLP_S4_L timing and fault-pattern guide.
Conclusion
The most reliable way to diagnose an older ISL6259-based Intel Mac is to follow the sequence in order: full DC-in, PP3V42_G3H, U7100 startup, ACOK, Q7180 input transfer, base PPBUS_G3H and finally SMC-commanded regulation. Recording the first checkpoint that fails turns a broad “no PPBUS” symptom into a much smaller, testable section of the circuit.
